Time encoders have been described in the prior art. For example, U.S. Pat. No. 7,515,084, issued Apr. 7, 2009, and U.S. Pat. No. 7,750,835, issued Jul. 6, 2010, which are incorporated herein by reference, describe time encoders. A time encoder encodes an analog input in the timing of pulses in an output pulse data train. The pulses in the pulse data train are asynchronous and not synchronized to a clock, so it is possible to operate at higher frequencies than with a synchronous clocked system. However, prior art time encoders have less than desirable performance due to non-ideal circuitry, which may include nonlinearities, non-ideal current sources, and circuit offset mismatches.
What is needed is a time encoder that has improved performance. Design time reduction is also desirable. The embodiments of the present disclosure answer these and other needs.
In a first embodiment disclosed herein, a circuit for correcting time encoder errors comprises a time encoder having a time encoder input, a time encoder output, and a current summing point, and a pulse width modifier coupled to the time encoder output, the pulse width modifier having a current output coupled to the current summing point, and having a corrected output, wherein the pulse width modifier is configured to calibrate duty cycle errors and nonlinearity errors on the time encoder output, to correct the duty cycle errors and the nonlinearity errors on the time encoder output, and to output the corrected output.
In another embodiment disclosed herein, a method for correcting time encoder errors comprises providing a time encoder having a time encoder input, a time encoder output, and a current summing point, providing a pulse width modifier coupled to the time encoder output, the pulse width modifier having a current output coupled to the current summing point, and having a corrected output; calibrating duty cycle errors on the time encoder output using the pulse width modifier and storing the duty cycle errors; calibrating nonlinearity errors on the time encoder output using the pulse width modifier and storing the nonlinearity errors, correcting the duty cycle errors and nonlinearity errors, and outputting the corrected output.
In yet another embodiment disclosed herein, a method for reducing time encoder design time comprises providing a time encoder having a time encoder input, a time encoder output, and a current summing point, providing a pulse width modifier coupled to the time encoder output, the pulse width modifier having a current output coupled to the current summing point, and having a corrected output; calibrating duty cycle errors on the time encoder output using the pulse width modifier and storing the duty cycle errors; calibrating nonlinearity errors on the time encoder output using the pulse width modifier and storing the nonlinearity errors, correcting the duty cycle errors and nonlinearity errors, and outputting the corrected output.
These and other features and advantages will become further apparent from the detailed description and accompanying figures that follow. In the figures and description, numerals indicate the various features, like numerals referring to like features throughout both the drawings and the description.